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High performance robust audio event recognition system based on FPGA platform
Affiliation:1. School of Computing, Informatics, and Decision Systems Engineering, Arizona State University, Tempe, AZ, USA;2. Ultrascale Systems Research Center, Los Alamos National Laboratory, Los Alamos, NM, USA;2. Oak Ridge National Laboratory, USA;3. School of Computer Science, University of Manchester, United Kingdom;4. Depto. Ingeniería y Ciencia de Computadores, Universidad Jaume I (UJI), Castellón, Spain
Abstract:
Keywords:Audio event recognition  Convolutional neural networks  1-max pooling  Precision evaluation  Parallel architecture  FPGA
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