Simulating Turing machines on Maurer machines |
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Authors: | J.A. Bergstra C.A. Middelburg |
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Affiliation: | aProgramming Research Group, University of Amsterdam, P.O. Box 41882, 1009 DB Amsterdam, Netherlands;bDepartment of Philosophy, Utrecht University, P.O. Box 80126, 3508 TC Utrecht, Netherlands |
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Abstract: | In a previous paper, we used Maurer machines to model and analyse micro-architectures. In the current paper, we investigate the connections between Turing machines and Maurer machines with the purpose to gain an insight into computability issues relating to Maurer machines. We introduce ways to simulate Turing machines on a Maurer machine which, dissenting from the classical theory of computability, take into account that in reality computations always take place on finite machines. In one of those ways, multi-threads and thread forking have an interesting theoretical application. |
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Keywords: | Turing machine Maurer machine Thread algebra Strategic interleaving Thread forking Fair interleaving strategy |
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