A method for simulating non-normal distributions

A method of introducing a controlled degree of skew and kurtosis for Monte Carlo studies was derived. The form of such a transformation on normal deviates [X N(0, 1)] isY =a +bX +cX ² +dX ³. Analytic and empirical validation of the method is demonstrated.This work was done while the author was at the University of Illinois at Champaign-Urbana.     

A bayesian approach to confirmatory factor analysis

Confirmatory factor analysis is considered from a Bayesian viewpoint, in which prior information on parameter is incorporated in the analysis. An iterative algorithm is developed to obtain the Bayes estimates. A numerical example based on longitudinal data is presented. A simulation study is designed to compare the Bayesian approach with the maximum likelihood method.Computer facilities were provided by the Computer Services Center, The Chinese University of Hong Kong.     

TEACHING SELF-ADMINISTRATION OF SUCTIONING TO CHILDREN WITH TRACHEOSTOMIES

We examined the effectiveness of using dolls to teach young children with tracheostomies to self-administer a suctioning procedure. Four children between the ages of 5 and 8 years, who had had tracheostomies for 6 months or longer, participated. After skills were taught via doll-centered simulations, in vivo skills were evaluated. All of the training and probe sessions were conducted in the participants' classrooms or homes. Results of a multiple baseline design across subjects and skill components indicated that the performance of all children improved as a function of training. Skill maintenance was demonstrated by all participants during follow-up assessments conducted 2 to 6 weeks posttraining. Results of a questionnaire completed by caregivers and interviews with the children revealed high levels of satisfaction with the training procedures and outcomes.     

弱智儿童感知动作技能特点的实验研究

本研究以难易程度不同的两个打洞操作作业 ,对弱智儿童和正常儿童的感知 动作技能进行了多种参数的测查。结果发现 :两类儿童在理解操作要点、操作速度、操作动作协调性以及操作正确性等各个方面都有明显的差异。同时通过比较 ,对弱智儿童感知 动作技能的特点 ,从外部肢体动作方式和内部智力动作方式两方面进行了详细的分析 ,并在此基础上对弱智儿童的感知 动作技能的教育与训练提出了建议 ,这对弱智学校改革教学、提高教学质量具有重要意义。     

图形型归纳推理的神经机制:一项fMRI研究

利用fMRI脑成像技术探讨图形型归纳推理的神经机制。设计了一种由图形形状和条纹方向描述的简单几何图形组成的归纳推理任务,这种图形型任务与以往研究中常用的语句型归纳推理任务是同质的。根据两个图形共享特征数量的不同设计了两种实验任务:共享两个特征(2T)和共享一个特征(1T),以休息基线(Rest)作为控制任务。2T和1T任务均为归纳推理任务,但2T任务包含知觉特征整合成分,而1T任务不包括。结果发现:与控制任务相比,归纳推理任务在前额区(BA6、9、11、46、47)、尾状核、壳核和丘脑等脑区有显著激活,反映了"前额皮层-纹状体-丘脑"通路在图形型归纳推理中的重要作用;图形型归纳推理中的知觉信息整合与右侧额下回(BA47)、双侧尾状核头部、壳核等脑区有关。     

注意捕获效应受知觉负载及目标与干扰项距离的共同影响

研究考察了无关干扰项引发的注意捕获效应如何受到任务知觉负载以及目标与干扰项距离的共同影响。被试在视觉搜索集中搜索目标并做辨别反应。通过控制搜索集的大小来控制任务知觉负载, 同时在搜索集中存在一个用颜色标定的无关干扰项(奇异项), 该奇异项与当前的搜索目标存在一致、中性或不一致的关系, 该奇异项的位置与当前目标相邻或相距较远。结果发现, 被试在低负载条件下出现显著的干扰效应(不一致条件的反应时减中性条件的反应时), 而在高负载条件下干扰效应减小。此外, 在高负载条件下, 当目标与干扰项相距较近时没有出现干扰效应, 而当目标与干扰项相距较远时存在显著的干扰效应。干扰效应受到任务知觉负载和目标与无关干扰项距离的共同影响。这些结果说明, 与任务无关的刺激是否捕获注意取决于当前任务总体上是否存在可用的剩余注意资源, 也受到其周围临近区域的局部注意资源是否充足的影响。     

从知觉负载理论来理解选择性注意

知觉负载理论被认为解决了选择性注意研究的早选择和晚选择观点之争。当前任务对注意资源的耗用程度决定了与任务无关的干扰刺激得到多少加工,从而导致在低知觉负载下,注意资源自动溢出去加工干扰刺激（晚选择）,而在高知觉负载下,注意资源被当前任务耗尽而无法加工干扰刺激（早选择）。知觉负载理论提出后,研究者进行了一系列研究。一部分工作专注于知觉负载对选择性注意的调节作用;另外一些工作则关注其他认知过程如何影响注意资源的分配,其中知觉负载与工作记忆负载的关系是当前关注重点。     

记忆的知觉干扰效应研究概述

知觉干扰效应是指在识记阶段快速呈现一个单词,紧接着给予一个倒行掩蔽的刺激,在随后的记忆测验中被试表现出对单词的记忆增强的一种现象。知觉干扰效应的影响因素分为测验方式、实验设计方式、实验材料的属性和其他影响因素四个方面。理论解释主要有六种：精细加工假说、时空背景假说、任务要求假说、补偿加工假说、选择性复述假说以及项目特异关联假说。最后,文章从研究领域和实验材料的拓展以及主观因素的影响展望了该研究领域     

Evaluating Equating Transformations in IRT Observed-Score and Kernel Equating Methods

Test equating is a statistical procedure to ensure that scores from different test forms can be used interchangeably. There are several methodologies available to perform equating, some of which are based on the Classical Test Theory (CTT) framework and others are based on the Item Response Theory (IRT) framework. This article compares equating transformations originated from three different frameworks, namely IRT Observed-Score Equating (IRTOSE), Kernel Equating (KE), and IRT Kernel Equating (IRTKE). The comparisons were made under different data-generating scenarios, which include the development of a novel data-generation procedure that allows the simulation of test data without relying on IRT parameters while still providing control over some test score properties such as distribution skewness and item difficulty. Our results suggest that IRT methods tend to provide better results than KE even when the data are not generated from IRT processes. KE might be able to provide satisfactory results if a proper pre-smoothing solution can be found, while also being much faster than IRT methods. For daily applications, we recommend observing the sensibility of the results to the equating method, minding the importance of good model fit and meeting the assumptions of the framework.     

A multiple-valued logic approach to the design and verification of hardware circuits

We present a novel approach, which is based on multiple-valued logic (MVL), to the verification and analysis of digital hardware designs, which extends the common ternary or quaternary approaches for simulations. The simulations which are performed in the more informative MVL setting reveal details which are either invisible or harder to detect through binary or ternary simulations. In equivalence verification, detecting different behavior under MVL simulations may lead to the discovery of a genuine binary non-equivalence or to a qualitative gap between two designs. The value of a variable in a simulation may hold information about its degree of truth and its “place of birth” and “date of birth”. Applications include equivalence verification, initialization, assertions generation and verification, partial control on the flow of data by prioritizing and block-oriented simulations. Much of the paper is devoted to theoretical aspects behind the MVL approach, including the reason for choosing a specific algebra for computations and the introduction of the notions of De Morgan Canonical Form and of verification complexity of Boolean expressions. Two basic simulation-based algorithms are presented, one for satisfying and verifying combinational designs and the other for equivalence verification of sequential designs.