A low power fuzzy logic based variable resolution ADC for wireless ECG monitoring systems

Portable low power and high quality monitoring devices play an important role for improving the performance of wireless body sensor networks. Mixed signal processor is required in ECG monitoring unit that comprises of analog front end, analog to digital converter (ADC) and digital signal processor. ADC is a core element in mixed signal processing unit and the proper design of ADC is crucial for data acquisition without losing heart related information and originality. The adaptive sampling has been used in the existing ADCs for choosing the sampling clock adaptively. Adaptive sampling rate ADC performs compression and reduces power consumption to some extent, however low powers ADCs are essential in wireless healthcare monitoring systems. In this paper, fuzzy logic based variable resolution controller is proposed to design the ADC efficiently in terms of circuit complexity and power. To further reduce the power consumption, power gating technique is adopted for static power reduction. Under 90 nm CMOS technology, gate count, core area utilization and power consumption have been determined for existing adaptive sampling ADC and fuzzy logic based adaptive sampling ADC. Cadence design tools have been used for the measurement of power in the designed circuit. The performance has been found to be better in terms of area and power that are very much essential for wireless ECG monitoring systems.     

新时代“健康优先”的三重理论逻辑

新时代我国施行“健康优先”在理论上合乎天然的逻辑。基于法理逻辑、价值逻辑和生产逻辑构建一个三重维度的分析框架。公民的生命权、健康权和发展权的保障和维护,是从微观个体层面催生“健康优先”的法理逻辑。汇聚到人民群众层面,“健康优先”与“以人民为中心”的发展思想共轭产生“以人民健康为中心”的理念,其价值逻辑不言自明。“健康优先”的生产逻辑体现在着眼于“现实的人”这一具有能动性的生产要素,既有利于人力资本的“再生产”,也有利于改善和提升健康人力资本。

     

A multiple-valued logic approach to the design and verification of hardware circuits

We present a novel approach, which is based on multiple-valued logic (MVL), to the verification and analysis of digital hardware designs, which extends the common ternary or quaternary approaches for simulations. The simulations which are performed in the more informative MVL setting reveal details which are either invisible or harder to detect through binary or ternary simulations. In equivalence verification, detecting different behavior under MVL simulations may lead to the discovery of a genuine binary non-equivalence or to a qualitative gap between two designs. The value of a variable in a simulation may hold information about its degree of truth and its “place of birth” and “date of birth”. Applications include equivalence verification, initialization, assertions generation and verification, partial control on the flow of data by prioritizing and block-oriented simulations. Much of the paper is devoted to theoretical aspects behind the MVL approach, including the reason for choosing a specific algebra for computations and the introduction of the notions of De Morgan Canonical Form and of verification complexity of Boolean expressions. Two basic simulation-based algorithms are presented, one for satisfying and verifying combinational designs and the other for equivalence verification of sequential designs.     

Bunched sequential information

It is known that the logic BI of bunched implications is a logic of resources. Many studies have reported on the applications of BI to computer science. In this paper, an extension BIS of BI by adding a sequence modal operator is introduced and studied in order to formalize more fine-grained resource-sensitive reasoning. By the sequence modal operator of BIS, we can appropriately express “sequential information” in resource-sensitive reasoning. A Gentzen-type sequent calculus SBIS for BIS is introduced, and the cut-elimination and decidability theorems for SBIS are proved. An extension of the Grothendieck topological semantics for BI is introduced for BIS, and the completeness theorem with respect to this semantics is proved. The cut-elimination, decidability and completeness theorems for SBIS and BIS are proved using some theorems for embedding BIS into BI.     

Can Hardcore Actualism Validate S5?

Hardcore actualism (HA) grounds all modal truths in the concrete constituents of the actual world (see, e.g., Borghini and Williams (2008), Jacobs (2010), Vetter (2015)). I bolster HA, and elucidate the very nature of possibility (and necessity) according to HA, by considering if it can validate S5 modal logic. Interestingly, different considerations pull in different directions on this issue. To resolve the tension, we are forced to think hard about the nature of the hardcore actualist’s modal reality and how radically this departs from possible worlds orthodoxy. Once we achieve this departure, the prospects of a hardcore actualist validation of S5 look considerably brighter. This paper thus strengthens hardcore actualism by arguing that it can indeed validate S5–arguably the most popular logic of metaphysical modality–and, in the process, it elucidates the very nature of modality according to this revisionary, but very attractive, modal metaphysics.     

Formal assessment of reliability specifications in embedded cyber-physical systems

Reliability has become an integral component of the design intent of embedded cyber-physical systems. Safety-critical embedded systems are designed with specific reliability targets, and design practices include the appropriate allocation of both spatial and temporal redundancies in the implementation to meet such requirements. With increasing complexity of such systems and considering the large number of components in such systems, redundancy allocation requires a formal scientific basis. In this work, we profess the analysis of the redundancy requirement upfront with the objective of making it an integral part of the specification. The underlying problem is one of synthesizing a formal specification with built-in redundancy artifacts, from the formal properties of the error-free system, the error probabilities of the control components, and the reliability target. We believe that upfront formal analysis of redundancy requirements is important in budgeting the resource requirements from a cost versus reliability perspective. Several case-studies from the automotive domain highlight the efficacy of our proposal.     

Reconceptualizing the Transitive Inference Ability: A Framework for Existing and Future Research

It has often been claimed that to demonstrate transitive inference is to demonstrate a logical ability, and by implication that transitivity as a property is generally a logical entity. Both claims are considered using a theoretically driven analysis together with consideration of relevant existing experimental research and some newly reported findings. This approach suggests an account of transitivity and transitive inferential reasoning that differs not only from the classic Piagetian account, but also from the information processing account so dominant today. We begin by considering one important issue, that the “logical” definitional criterion can only be approached if individuals are required to demonstrate a capacity for transitive inference that is discriminative in nature. This, together with interpretation of findings from existing transitive tasks, leads to the postulate of a three-component psychological system, with the components relying on perceptual, linguistic, and conceptual subprocesses and sensitivity to simple cues. The framework is testable and accommodates important aspects of classic and modern accounts of “transitive development” that until now have been taken to be mutually exclusive. It also readily accommodates both human and nonhuman research, yet neither a formal logical structure nor memory in any general sense need be assigned the primary role.